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october 2014 docid025141 rev 3 1 / 14 this is information on a product in full production. www.st.com STL9P2UH7 p - channel 20 v, 0.0195 ? typ., 9 a stripfet? h7 power mosfet in a powerflat? 3.3x3.3 package datasheet - production data figure 1 : internal schematic diagram features order code v ds r ds(on) max i d STL9P2UH7 20 v 0.0225 @ 4.5 v 9 a ? very low on - resistance ? very low capacitance and gate charge ? high avalanche ruggedness applications ? switching applications description this p - channel power mosfet utilizes the stripfet h7 technology with a trench gate structure combined with extremely low on - resistance. the device also offers ultra - low capacitances for higher switching frequency operations. table 1: device summary order code marking package packaging STL9P2UH7 9p2h7 powerflat? 3.3x3.3 tape and reel for the p - channel power mosfet the actual polarity of the voltages and the current must be reversed. d(5, 6, 7, 8) g(4) s(1, 2, 3) 8 1 2 3 4 7 6 5 1 2 3 4 powerfl a t? 3.3x3.3
contents STL9P2UH7 2 / 14 docid025141 rev 3 contents 1 electrical ratings ................................ ................................ ............. 3 2 electrical characteristics ................................ ................................ 4 2.1 electrical characteristics (curves) ................................ ...................... 6 3 test circuits ................................ ................................ ..................... 8 4 package mechanical data ................................ ............................... 9 4.1 powerflat? 3.3 x 3.3 package mechanical data ......................... 10 5 rev ision history ................................ ................................ ............ 13
STL9P2UH7 electrical ratings docid025141 rev 3 3 / 14 1 electrical ratings table 2: absolute maximum ratings symbol parameter value unit v ds drain - source voltage 20 v v gs gate - source voltage 8 v i d (1) drain current (continuous) at t pcb = 25 c 9 a i d (1) drain current (continuous) at t pcb = 100 c 5.9 a i dm (2) drain current (pulsed) 36 a p tot (1) total dissipation at t pcb = 25 c 2.9 w t stg storage temperature - 55 to 150 c t j max. operating junction temperature 150 c notes: (1) the value is rated according to r thj - pcb (2) pulse width limited by safe operating area table 3: thermal resistance symbol parameter value unit r thj - case thermal resistance junction - case 2.5 c/w r thj - pcb (1) thermal resistance junction - pcb 42 c/w notes: (1) when mounted on fr - 4 board of 1inch2, 2oz cu, t < 10 sec. for the p - channel power mosfet the actual polarity of the voltages and the current must be reversed.
electrical characteristics STL9P2UH7 4 / 14 docid025141 rev 3 2 electrical characteristics (t c = 25 c unless otherwise specified) table 4: on /off states symbol parameter test conditions min. typ. max. unit v (br)dss drain - source breakdown voltage v gs = 0, i d = 250 a 20 v i dss zero gate voltage drain current v g s = 0, v ds = 20 v 1 a i gss gate - body leakage current v ds = 0, v gs = 5 v 5 a v gs(th) gate threshold voltage v ds = v gs , i d = 250 a 0.4 1 v r ds(on) static drain - source on - resistance v gs = 4.5 v, i d = 4.5 a 0.0195 0.0225 ? v gs = 2.5 v, i d = 4.5 a 0.02 0.025 ? v gs = 1.8 v, i d = 4.5 a 0.036 0.043 ? v gs = 1.5 v, i d = 4.5 a 0.05 0.085 ? table 5: dynamic symbol parameter test conditions min. typ. max. unit c iss input capacitance v gs = 0, v ds = 16 v, f = 1 mhz - 2390 - pf c oss output capacitance - 220 - pf c rss reverse transfer capacitance - 188 - pf q g total gate charge v dd = 15 v, i d = 9 a, v gs = 4.5 v - 22 - nc q gs gate - source charge - 4.2 - nc q gd gate - drain charge - 3.6 - nc table 6: switching times symbol parameter test conditions min. typ. max. unit t d(on) turn - on delay time v dd = 16 v, i d = 9 a, r g = 1 ?, v gs = 4.5 v - 12.5 - ns t r rise time - 30.5 - ns t d(off) turn - off delay time - 128 - ns t f fall time - 84.5 - ns
STL9P2UH7 electrical characteristics docid025141 rev 3 5 / 14 table 7: source drain diode symbol parameter test conditions min. typ. max. unit v sd (1) forward on voltage v gs = 0, i sd = 1 a - - 1 v t rr reverse recovery time v dd = 16 v di/dt = 100 a/s, i sd = 1 a - 15.8 ns q rr reverse recovery charge - 5.9 nc i rrm reverse recovery current - 0.7 a notes: (1) pulsed: pulse duration = 300 s, duty cycle 1.5% for the p - channel power mosfet the actual polarity of the voltages and the current must be reversed.
electrical characteristics STL9P2UH7 6 / 14 docid025141 rev 3 2.1 electrical characteristics (curves) figure 2 : safe operating area figure 3 : thermal impedance figure 4 : output characteristics figure 5 : transfer characteristics figure 6 : gate charge vs gate - source voltage figure 7 : static drain - source on - resistance 0.05 0.02 0.01 0.1 0.2 pcb v gs 3 2 1 0 0 10 q g (nc) (v) 4 15 20 v dd =16v i d =9 a 5 gipg210520141043s a r ds(on) 19.0 18.5 18.0 0 2 i d (a) (m ) 1 3 19.5 v gs =4.5v 4 5 20.0 20.5 6 gipg21052014 1 102s a i d 15 5 0 0 2 v ds (v) 6 (a) 4 v gs =2.5, 3, 3.5, 4, 4.5, 5v 10 20 8 2v 1.5v gipg210520141044s a i d 10 1 0.1 0.1 1 v ds (v) 10 (a) operation in this area is limited by max r ds(on) 10ms 1ms 100s 0.01 tj=150c tpcb=25c single pulse gipg2105201410 1 1s a i d 8.00 0.00 0 1 v gs (v) 2 (a) 0.5 1.5 4.00 12.00 v ds =2v gipg210520141055s a
STL9P2UH7 electrical characteristics docid025141 rev 3 7 / 14 figure 8 : capacitance variations figure 9 : normalized gate threshold voltage vs temperature figure 10 : normalized on - resistance vs temperature figure 11 : normalized v(br)dss vs temperature fi gure 12 : source - drain diode forward characteristics v sd 1 3 i sd (a) (v) 2 6 4 5 0.5 0.6 0.7 0.8 t j =-55c t j =75c t j =25c 0.9 7 8 gipg21052014 1 134s a v gs(th) 0.6 0.4 0.2 -75 t j (c) (norm) 0.8 75 -25 125 i d =250 a 25 1 1.2 1.4 gipg21052014 11 14s a c 1000 100 0 8 v ds (v) (pf) 4 12 ciss coss crss 16 gipg21052014 1 108s a r ds(on) 1.4 0.8 0.4 0.0 t j (c) (norm) 0.2 0.6 1.0 1.2 1.6 i d =4.5 a v gs =4.5v -75 75 -25 125 25 gipg21052014 11 19s a v (br)dss t j (c) (norm) 0.92 0.96 1 1.04 i d =1m a -75 75 -25 125 25 gipg21052014 1 132s a
test circuits STL9P2UH7 8 / 14 docid025141 rev 3 3 test circuits figure 13 : switching times test circuit for resistive load figure 14 : gate charge test circuit figure 15 : test circuit for inductive load switching and diode recovery times
STL9P2UH7 package mechanical data docid025141 rev 3 9 / 14 4 package mechanical data in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark.
package mechanical data STL9P2UH7 10 / 14 docid025141 rev 3 4.1 powerflat? 3.3 x 3.3 package mechanical data figure 16 : powerflat? 3.3 x 3.3 drawing bot t om view side view t o p view 8465286_ a
STL9P2UH7 package mechanical data docid025141 rev 3 11 / 14 table 8: powerflat? 3.3 x 3.3 mechanical data dim. mm min. typ. max. a 0.70 0.80 0.90 b 0.25 0.30 0.39 c 0.14 0.15 0.20 d 3.10 3.30 3.50 d1 3.05 3.15 3.25 d2 2.15 2.25 2.35 e 0.55 0.65 0.75 e 3.10 3.30 3.50 e1 2.90 3.00 3.10 e2 1.60 1.70 1.80 h 0.25 0.40 0.55 k 0.65 0.75 0.85 l 0.30 0.45 0.60 l1 0.05 0.15 0.25 l2 0.15 j 8 10 12
package mechanical data STL9P2UH7 12 / 14 docid025141 rev 3 figure 17 : powerflat? 3.3 x 3.3 recommended footprint 8465286_footprint
STL9P2UH7 revision history docid025141 rev 3 13 / 14 5 revision history table 9: document revision history date revision changes 26 - aug - 2013 1 first release. 04 - jun - 2014 2 document status promoted from preliminary data to production data modified: title modified: r ds(on) max value in cover page modified: r ds(on) (typical and maximum) values in table 4: "on /off states" modified: the entire typical values in table 5: "dynamic", table 6: "switching times" and table 7: "source drain diode" added: section 8.1: "electrical characteristics (cur ves)" minor text changes 21 - oct - 2014 3 updated the title, the features and the description in cover page. updated figure 1: "internal schematic diagram" . minor text changes .
STL9P2UH7 14 / 14 docid025141 rev 3 important notice C please read carefully stmicroelectronics nv and its subsidiaries (st) reserve the right to make changes, corrections, enhancements, modifications , and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant information on st products before placing orders. st products are sold pursuant to sts terms and conditions of sale in place at the time of or der acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and s t assumes no liability for application assistance or the design of purchasers products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information se t forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2014 stmicroelectronics C all rights reserved

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